%FILENAME%
vtr-9.0.0-1-loong64.pkg.tar.zst

%NAME%
vtr

%BASE%
vtr

%VERSION%
9.0.0-1

%DESC%
Verilog to Routing -- Open Source CAD Flow for FPGA Research

%CSIZE%
7722925

%ISIZE%
26341004

%SHA256SUM%
bdfd59ac8942e047620a2ebb7b09bd2b4f152bc5267873b310aeb80405c22b26

%PGPSIG%
iHUEABYKAB0WIQSmwC++cwzUWFm5RuFcdK4XC9oUMwUCaE+o+gAKCRBcdK4XC9oUMxheAP9cFOpiqLzdpT6OH3aNv3HjFUU10ckyZYMQjvc3y6xihwD/XS+GWZQq/MwDGYSKL0oPUZRAqTUJe0DJI1xb5uRGeQ0=

%URL%
https://verilogtorouting.org

%LICENSE%
MIT

%ARCH%
loong64

%BUILDDATE%
1750049833

%PACKAGER%
LCPU <lcpu@pku.edu.cn>

%DEPENDS%
ctags
tbb

%MAKEDEPENDS%
cmake
wget

