Function core::arch::mips64::__msa_ilvr_b

pub unsafe fn __msa_ilvr_b(a: v16i8, b: v16i8) -> v16i8

🔬 This is a nightly-only experimental API. (stdsimd #48556)

This is supported on MIPS-64 and target feature msa only.

Vector Interleave Right

The right half elements in vectors a (sixteen signed 8-bit integer numbers) and vector b (sixteen signed 8-bit integer numbers) are copied to the result (sixteen signed 8-bit integer numbers) alternating one element from a with one element from b.